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<div class="textblock"><p>The Xilinx Dual Channel Fifo driver component. This driver supports the Virtex-5(TM) and Virtex-4(TM) XPS_ll_Fifo and the AxiFifo.</p>
<p>For a full description of the bridge features, please see the HW spec. This driver supports the following features:</p>
<ul>
<li>Memory mapped access to host interface registers</li>
<li>API for polled frame transfers</li>
<li>API for interrupt driven frame transfers</li>
<li>Virtual memory support</li>
<li>Full duplex operation</li>
</ul>
<h2>Driver Description</h2>
<p>This driver enables higher layer software to access the XPS_llFifo core using any alignment in the data buffers.</p>
<p>This driver supports send and receive channels in the same instance structure in the same fashion as the hardware core.</p>
<h2>Initialization</h2>
<p>An instance of this driver is initialized using a call to Initialize().</p>
<h2>Usage</h2>
<p>It is fairly simple to use the API provided by this FIFO driver. The only somewhat tricky part is that the calling code must correctly call a couple routines in the right sequence for receive and transmit.</p>
<p>This sequence is described here. Check the routine functional descriptions for information on how to use a specific API routine.</p>
<h3>Receive</h3>
<p>A frame is received by using the following sequence:<br/>
 1) call <a class="el" href="group__llfifo.html#gaad292ddf2a2c9dde261b93da802c8080" title="XLlFifo_iRxGetLen notifies the hardware that the program is ready to receive the next frame from the ...">XLlFifo_iRxGetLen()</a> to get the length of the incoming frame<br/>
 2) call <a class="el" href="group__llfifo.html#gaed3ae31c8c24f46139fbd709027329ec" title="XLlFifo_RxGetWord reads one 32 bit word from the FIFO specified by InstancePtr. ">XLlFifo_RxGetWord()</a> one or more times to read the number of bytes reported by the hardware<br/>
 3) call <a class="el" href="group__llfifo.html#gae2da9fa947a6e50edd41375ddc4c9964" title="XLlFifo_iRxOccupancy returns the number of 32-bit words available (occupancy) to be read from the rec...">XLlFifo_iRxOccupancy()</a> to know the availability of the data in the FIFO.<br/>
</p>
<p>For example: </p>
<pre>
        ReceiveLength = (XLlFifo_iRxGetLen(InstancePtr))/WORD_SIZE;
        for ( i=0; i &lt; ReceiveLength; i++){
                RxWord = XLlFifo_RxGetWord(InstancePtr);
                // ********
                // do something here with the data
                // ********
                if(XLlFifo_iRxOccupancy(InstancePtr)){
                        RxWord = XLlFifo_RxGetWord(InstancePtr);
                }
        }</pre><pre> </pre><p>This FIFO hardware core does <b>not</b> support a sequence where the calling code calls iRxGetLen() twice in a row and then receive the data for two frames. Each frame must be read in by calling iRxGetLen() just prior to reading the data.</p>
<h3>Transmit</h3>
<p>A frame is transmittted by using the following sequence:<br/>
 1) <a class="el" href="group__llfifo.html#gac02405b23499d780e7bc1dfe371281a6" title="XLlFifo_iTxVacancy returns the number of unused 32 bit words available (vacancy) in the send channel ...">XLlFifo_iTxVacancy()</a> one or more times to know the availability of unused 32-bit words in the FIFO channel.<br/>
 2) call <a class="el" href="group__llfifo.html#ga29654d755dce84b861022179c99ca7a3" title="XLlFifo_TxPutWord writes the 32 bit word, Word to the FIFO specified by InstancePtr. ">XLlFifo_TxPutWord()</a> one or more times to write all the of bytes in the next frame.<br/>
 3) call <a class="el" href="group__llfifo.html#gaa49ecc1529434fd932d8a65d63a1a04d" title="XLlFifo_iTxSetLen begins a hardware transfer of data out of the transmit channel of the FIFO...">XLlFifo_iTxSetLen()</a> to begin the transmission of frame just written.<br/>
</p>
<p>For example: </p>
<pre>
        for (j=0 ; j &lt; MAX_PACKET_LEN ; j++){
                if( XLlFifo_iTxVacancy(InstancePtr) ){
                        XLlFifo_TxPutWord(InstancePtr,
                                *(SourceAddr+(i*MAX_PACKET_LEN)+j));
                }
        }
        XLlFifo_iTxSetLen(InstancePtr, (MAX_DATA_BUFFER_SIZE * WORD_SIZE));
 </pre><p>This FIFO hardware core does <b>not</b> support a sequence where the calling code writes the data for two frames and then calls iTxSetLen() twice in a row. Each frame must be written by writing the data for one frame and then calling iTxSetLen().</p>
<h2>Interrupts</h2>
<p>This driver does not handle interrupts from the FIFO hardware. The software layer above may make use of the interrupts by setting up its own handlers for the interrupts.</p>
<pre>
 MODIFICATION HISTORY:</pre><pre> Ver   Who  Date     Changes
</p>
<hr/>
<p>
 1.00a jvb  10/12/06 First release
 1.01a sdm  08/22/08 Removed support for static interrupt handlers from the
                       MDD file
 1.02a jz   12/04/09 Hal phase 1 support
 2.01a asa  09/17/10 Added code for resetting Local Link/AXI Streaming
                       interface for CR574868
 2.02a asa  12/27/11 Changed the function XStrm_Read in xtreamer.c to reset
                       HeadIndex to zero when all bytes have been read.
                       Changed the macro XStrm_IsRxInternalEmpty in file
                       xtreamer.h to use FrmByteCnt instead of HeadIndex.
                       When FrmByteCnt is zero, this means all internal buffers
                       in streamer are empty. Earlier implementation using
                       HeadIndex was not very clear and could give improper
                       results for some cases.
                       Changed the macro XLlFifo_IsRxEmpty in file <a class="el" href="xllfifo_8h.html">xllfifo.h</a>
                       These changes are done to fix the CR 604650.
  2.03a asa  14/08/12  Added XLLF_TDR_OFFSET, XLLF_RDR_OFFSET
                         defines for the new registers, and XLLF_INT_TFPF_MASK,
                         XLLF_INT_TFPE_MASK, XLLF_INT_RFPF_MASK and
                         XLLF_INT_RFPE_MASK for the new version of the
                         AXI4-Stream FIFO core (v2.01a and later)</pre><pre> 3.00a adk 08/10/13 Added support for AXI4 Datainterface.Changes are
                      In Xllfifo.c file XLlFifo_RxGetWord,XLlFifo_TxPutword.
                      In XLlfifo.h file updated XLlfifo structure for
                      Axi4BaseAddress and for Datainterface type provided
                      polling and interrupt examples. XLlfifo_IsRxDone Macro
                      Is added in the XLlfifo.h file for polledmode example.
                      Added Static initialization for the driver.
                      XLlFifo_Initialize is still used to make the driver
                      backward compatible.
 4.0   adk  19/12/13 Updated as per the New Tcl API's
 5.0   adk  15/05/15 Updated the register offsets in the AXI4 data path
                       as per latest IP version(v4.1)(CR:860254).
 5.1   sk   11/10/15 Used UINTPTR instead of u32 for Baseaddress CR# 867425.
                     Changed the prototypes of XLlFifo_CfgInitialize,
                     XLlFifo_Initialize APIs.
 5.1  adk   01/02/15 CR#885653 Fix Incorrect AXI4 Base address being
                     Exported to the xparameters.h file.
      ms    01/23/17 Modified xil_printf statement in main function for all
                     examples to ensure that "Successfully ran" and "Failed"
                     strings are available in all examples. This is a fix
                     for CR-965028.
      ms    03/17/17 Added readme.txt file in examples folder for doxygen
                     generation.
      ms    04/05/17  Added tabspace for return statements in functions for
                      proper documentation and Modified Comment lines
                      to consider it as a documentation block while
                      generating doxygen for llfifo examples.
 5.2  ms    04/18/17 Modified tcl file to add suffix U for all macros
                     definitions of llfifo in xparameters.h
 5.2 adk    03/07/17 CR#978769 Fix doxygen issues in the driver.
                       Updated comments in the usage section as per example code.
                       Fix doxygen warnings in the driver.
 5.5 sd     09/04/20  Makefile update for parallel execution.
 5.6 sd     07/7/23  Add system devicetree support.
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